Low quiescent power class AB current mirror circuit

Details Low quiescent power class AB current mirror circuit Low quiescent power class AB current mirror circuit

2003-06-02

2004-11-09

Choe, Henry (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including current mirror amplifier

C330S296000, C323S315000

Reexamination Certificate

active

06816014

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a low quiescent power class AB current mirror circuit.
BACKGROUND OF THE INVENTION
In a conventional current mirror circuit, the output current mirrors the input current. The bases of both transistors of the current mirror circuit are connected together and both base currents are derived from the input current. Thus, the output current is reduced relative to the input current by the two base currents introducing an error of 2I
B
. In an improved design, to reduce this error, a third transistor and a current source are used to supply the base currents thus eliminating that source of error. But it introduces another, lesser source of error, i.e. the current required to drive the base of the third transistor which is much smaller. However, with the addition of the third transistor there is now a two V
BE
drop at the first input transistor. A fourth transistor of opposite polarity to the third transistor can be added which subtracts one V
BE
. This circuit configuration operates generally at a low quiescent or operating point with good efficiency and can respond to an increase in the input current by quickly increasing the operating point of both the input and output transistors. However, when the input current again decreases, the operating point is not quickly returned to the lower operating point.
BRIEF SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a class AB current mirror circuit with a low quiescent power.
It is a further object of this invention to provide such an improved current mirror circuit which has improved bandwidth and transient response with a low quiescent power.
It is a further object of this invention to provide such an improved current mirror circuit with low quiescent power which quickly returns to a lower quiescent power operating point when the input signal decreases.
It is a further object of this invention to provide such an improved current mirror circuit with low quiescent power which has lower input base current error.
It is a further object of this invention to provide such an improved current mirror circuit with low quiescent power which has a low input voltage headroom requirement.
This invention results from the realization that a low quiescent power class AB current mirror which maintains lower base input current error and has a low input voltage headroom requirement can be achieved with a current supply which is connected to the bases of the input and output transistors and sinks current from those bases in response to a decrease in input current in order to quickly lower the operating point of the circuit.
This invention features a low quiescent power class AB current mirror circuit including a first input transistor for receiving an input current and a second output transistor for providing an output current. The first and second transistors have their bases connected together. There is a first current supply for sinking current from the bases in response to a decrease in input current to lower the quiescent point of the transistors.
In a preferred embodiment the first current supply may include a third sink transistor connected between the base of the second output transistor and a first power supply bus. The first current supply may also include a first current source connected between the base of the third sink transistor and the first power supply bus. The first current supply may also include a fourth biasing transistor interconnected between the base of the third sink transistor and a second power supply bus. There may be a second current supply for sourcing current to the bases of the transistors in response to an increase in input current to raise the quiescent point of the transistors. The second current supply may include a fifth transistor connected between the base of the first and second transistors and the second power supply bus. The fifth transistor may have a base connected to the second power supply bus through a second current source. There may be a sixth transistor for shifting the levels between the fifth transistor and the first transistor. The fourth and sixth transistors may be complementary bipolar devices with their bases interconnected and with offsetting base currents.


REFERENCES:
patent: 4471236 (1984-09-01), Patterson, III
patent: 4567444 (1986-01-01), Okanobu
patent: 5079518 (1992-01-01), Wakayama
patent: 5373253 (1994-12-01), Bailey et al.

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