Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Patent
1997-04-21
1998-07-07
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
257203, H01L 27118
Patent
active
057773548
ABSTRACT:
An apparatus and method of (input/output) I/O design, utilizing a predetermined relationship, whereby the outer ring area of an integrated circuit die are set aside for the I/O circuits which are contained in I/O cells. The height of the I/O cell is first reduced from the prior art cell heights, and the width of the cell is then varied according to the particular need of the circuit. When the drive strength of the I/O circuit is high, and the circuit is more complicated, a wider cell is assigned. Conversely, for a circuit that is relatively simple, a narrower cell will be assigned. Each I/O cell has one associated bonding pad which is placed directly below the starting point of that cell. The height of the cells may also be varied on each side of the chip in order to be able to place more I/O cells along one or more sides or edges of the chip.
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SGS-Thomson Microelectronics, "ISB35000 Series, HCOMS Structured Array," (Jan. 1994).
Atkinson Kevin
Cheung Gary H.
Colwell Michael J.
Lozano Elias
Nguyen Trung
Hardy David B.
LSI Logic Corporation
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