Low profile, current-driven relay for integrated circuit tester

Electricity: magnetically operated switches – magnets – and electr – Electromagnetically actuated switches – Vacuum or hermetically sealed type

Reexamination Certificate

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Details

C361S088000

Reexamination Certificate

active

06329892

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to relays and in particular to a current-driven relay having a low profile for use in routing signals on closely spaced circuits or circuit boards of an integrated circuit tester.
2. Description of Related Art
FIG. 1
is a block diagram of a portion of a typical prior art integrated circuit (IC) tester
10
including a set of channels
12
, one for each of several terminals of an IC device under test (DUT)
14
. Each channel
12
includes a channel control and data acquisition circuit
16
, a comparator
18
and a tristate driver
20
. A relay
24
links an input of comparator
18
and an output of driver
20
to a DUT terminal
26
. Another relay
25
connects a parametric measurement unit (PMU)
28
within channel
12
to DUT terminal
26
. A host computer
30
communicates with the channel circuits
16
of each channel
12
via a parallel bus
32
.
Tester
10
can carry out both digital logic and parametric tests on DUT
14
. Before starting a digital logic test, the control and data acquisition circuit
16
of each channel
12
closes relay
24
and opens relay
25
to connect comparator
18
and driver
20
to DUT terminal
26
and to disconnect PMU
28
from terminal
26
. Thereafter, during the digital logic test, the channel control signal may turn on driver
20
and signal it to send a logic test pattern to DUT terminal
26
when the DUT terminal
26
is acting as a DUT input. When terminal
26
is a DUT output, circuit
16
turns off driver
20
and supplies an “expect” bit sequence to an input of comparator
18
. Comparator
18
produces an output FAIL signal indicating whether successive states of the DUT output signal matches successive bits of the expect bit sequence. Circuit
16
either stores the FAIL data acquired during the test for later access by host computer
30
or immediately notifies host computer
30
when comparator
18
asserts the FAIL signal.
PMU
28
includes circuits for measuring analog characteristics of the DUT
14
at terminal
26
such as, for example, the DUT's quiescent current. Before starting a parametric test, the channel control circuit
16
opens relay
24
and closes relay
25
to connect the channel's PMU
28
to DUT terminal
26
and to disconnect comparator
18
and driver
20
from terminal
26
. Host computer
30
then programs PMU
28
to carry out the parametric test and obtains test results from the PMU.
Relays
24
and
25
are normally preferred over solid state switches for routing signals between DUT
14
, PMU
28
, driver
20
and comparator
18
because a relay has a very low loss that does not substantially influence test results. We would like to position comparator
18
, driver
20
, relays
24
and
25
, and circuit
16
as close as possible to DUT terminal
26
to minimize the signal path lengths between terminal
26
, comparator
18
and driver
20
. When the signal paths are too long, the signal delays they cause can make it difficult or impossible to provide the signal timing needed to properly test DUT
14
, particularly when the DUT operates at a high speed. Thus to minimize signal path distances we want to use relays
24
and
25
that are as short as possible and which can be reached via short signal paths.
In some prior art testers, one or more channels
12
are implemented on each of a set of printed circuit boards (“pin cards”) that are mounted in a cylindrical chassis to form a test head.
FIG. 2
illustrates a simplified plan view of a typical test head
34
.
FIG. 3
is a partial sectional elevation view of the test head
34
of FIG.
2
.
FIGS. 4 and 5
are expanded front and side elevation views of a lower portion of one of a set of pin cards
36
mounted within test head
34
. Pin cards
36
are radially distributed about a central axis
38
of test head
34
and positioned above an integrated circuit device under test (DUT)
14
mounted on a printed circuit board, “load board”
42
. A set of pogo pins
44
provide signal paths between relays
24
,
25
mounted on pin cards
36
and contact points on the surface of load board
42
. Microstrip traces on load board
42
connect the contact points to terminals of DUT
14
.
Relays
24
,
25
are mounted near the lower edges of each pin card
36
as close as possible to central axis
38
to minimize the signal path distance to DUT
14
. However from
FIG. 2
we can see that the space between pin cards
36
is relatively limited near axis
38
. Thus in order to position relays
24
,
25
close to axis
38
we want to use relays that are relatively thin.
FIG. 6
is a simplified sectional elevation view of a typical relay
40
. Relay includes a glass tube
42
containing a pair of conductive reeds
44
,
45
that serve as the relay's contacts
47
. A wire
46
wraps many turns around tube
42
to form a coil
48
. Reeds
44
,
45
are normally spaced apart, but when a voltage is applied across opposite leads
50
,
52
of coil
48
, magnetic flux produced by the coil causes reeds
44
,
45
to contact one another so that a current may flow through the relay contacts
47
. A conductive sheath
43
partially surrounds tube
42
to provide a ground surface. The spacing between reeds
44
,
45
and shield
43
influences the characteristic impedance of the transmission line formed by reeds
44
and
45
when they are in contact.
The magnetic force produced by coil
48
on reeds
44
,
45
is proportional to the product of the magnitude of the current passing through coil
48
and the number of turns of coil about tube
42
. A large number of coil turns is provided to minimize the amount of current needed to operate relay
40
. However the large number of turns contributes to the thickness of relays; a relay's coil typically contributes more than half the thickness of the relay.
FIG. 7
is a schematic diagram a typical circuit for driving coils of a set of N relays
40
. One end of each relay's coil
48
is connected to a voltage source
54
while the other end of the relay's coil is connected to ground through one of a set of N switches
49
controlled by one of control signals C
1
-CN. For example when a control signal C
1
turns on one of switches
49
, the current passes through relay coil
48
thereby causing the relay's contacts
47
to close. When control signal C
1
turns off switch
49
, current stops passing though coil
48
and allows contacts
47
to open.
When switch
49
opens, the magnetic field produced by coil
48
collapses producing a transient voltage spike across coil
48
that is limited by a diode
56
connected across the coil. Without diode
56
the voltage spike would pass though voltage source
54
and appear as undesirable noise in other circuits receiving power from voltage source
54
. However while diode
56
reduces the amount of switching noise produced by relay
40
, it also adds to the bulk of the relay.
What is needed is a low profile relay for mounting on a printed circuit board wherein the relay occupies relatively little space above the circuit board and which can be packed densely on a circuit board.
SUMMARY OF THE INVENTION
A relay in accordance with one aspect of the invention includes contacts residing within a glass tube. A coil surrounding the tube and a switch are connected in parallel between two terminals of the relay. A current source supplies a current to the coil and switch. When the switch is open, all of the current passes through the coil and the coil produces a sufficient amount of magnetic flux to close the relay's contacts. When the switch closes, it shunts a sufficient amount of the current away from the coil to reduce the magnetic flux it produces below the level needed to keep the contacts closed.
Since the total amount of current passing through the relay coil and switch remains constant regardless of whether the relay contacts are opened or closed, relay switching does not produce substantial voltage transients in the power supply. Thus the relay does not require a d

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