Low profile ball-grid array package for high power

Details Low profile ball-grid array package for high power Low profile ball-grid array package for high power

2006-12-26

2006-12-26

Parker, Kenneth (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S707000

Reexamination Certificate

active

07154166

ABSTRACT:
A low-profile, high power ball grid array, or land grid array, device including a plastic tape having first and second surfaces, a portion of the first surface covered with an adhesive layer. First and second openings are stamped through the tape and adhesive layer, the first openings configured for solder balls and the second openings configured to accommodate circuit chips. A copper foil is laminated on the adhesive layer, and the portion of this copper foil in the second openings is mechanically shaped into a position coplanar with the second surface, whereby it becomes useable as a chip mount pad, exposed after encapsulation for low resistance heat dissipation. The circuit chips are mounted by means of a thermally conductive material on each of the chip mount pads. Encapsulating material surrounds the mounted chips in low profile. For ball grid array devices, solder balls are attached to the copper foil exposed by the first openings in the tape.

REFERENCES:
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patent: 5594234 (1997-01-01), Carter et al.
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patent: 6194781 (2001-02-01), Ikegami
patent: 2002/0066592 (2002-06-01), Cheng
patent: 2002/0079572 (2002-06-01), Khan et al.
patent: 06177316 (1994-06-01), None

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