Low power/zero-offset charge pump circuits for DLLs and PLLs

Details Low power/zero-offset charge pump circuits for DLLs and PLLs Low power/zero-offset charge pump circuits for DLLs and PLLs

2006-06-20

2008-12-30

Kinkead, Arnold (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S185000, C327S156000, C327S159000, C327S161000

Reexamination Certificate

active

07471157

ABSTRACT:
A charge pump that generates a bias input to affect an output voltage of the charge pump is described herein. The charge pump may include a charge pump stage, a replica charge pump stage, and a self-biased differential amplifier. In some instances, the charge pump may be incorporated into a delay locked loop or a phase locked loop.

REFERENCES:
patent: 5508660 (1996-04-01), Gersbach et al.
patent: 6107889 (2000-08-01), Strange et al.
patent: 6710665 (2004-03-01), Maneatis
patent: 6721379 (2004-04-01), Cranford et al.

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