Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-06-01
2001-11-20
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
Reexamination Certificate
active
06320454
ABSTRACT:
TECHNICAL FIELD
The invention relates to voltage regulator circuits, and more particularly to a circuit that receives an external power supply voltage as an input and provides as an output a specified level of voltage for an internal circuit of an integrated circuit device.
BACKGROUND ART
In the field of integrated circuits, compatibility requires the use of a conventional 5V power supply for most circuit devices. Also, compatibility requires many TTL circuits to work at a conventional 5V external power supply voltage. However, when the degree of integration increases, many circuits are manufactured to work at a lower voltage (such as 3V) in order to lower power consumption and reduce excessive electrical field. Therefore, there is a need for voltage regulator circuits (voltage stepdown circuits) arranged inside the devices to convert the high voltage level (5V) of an external power supply down to a desired level (3V-4V) and to supply that voltage to the internal circuit of the device. Many designs of the voltage regulator circuit exist.
FIG. 7
shows a conventional internal stepdown circuit
17
that is also described in the background art section of U.S. Pat. No. 5,189,316 to Murakami et al. The illustrated internal stepdown circuit
17
essentially consists of a reference voltage generator circuit
100
and an internal voltage control circuit
200
. The reference voltage generator circuit
100
is adapted to generate a reference voltage VREF with respect to the internal voltage control circuit
200
, and includes p-channel MOS (PMOS) transistors
111
-
115
. The PMOS transistors
111
-
113
are connected in series to each other and are interposed between a supply input terminal
300
and ground GND. These PMOS transistors
111
-
113
are used as resistors, respectively, and constitute a resistive potential divider circuit. The supply input terminal
300
receives a supply voltage Ext.Vcc from an external power supply (not shown). Other PMOS transistors
114
and
115
are connected in series to each other, and are interposed between the supply input terminal
300
and the ground GND in parallel to the above described PMOS transistors
111
-
113
.
The internal voltage control circuit
200
is adapted to correct an internal voltage VINT based on the reference voltage VREF so as to prevent the fluctuation of the internal voltage VINT which may be caused by the fluctuation of the supply voltage Ext.Vcc, and is formed of a current quantity switching circuit
210
, a voltage comparator circuit
220
and an output transistor P
225
. The current quantity switching circuit
210
is adapted to switch a current quantity supplied to the voltage comparator circuit
220
in accordance with switching between an active mode and a standby mode of the semiconductor integrated circuit device, and is formed of two PMOS transistors P
211
and P
212
interposed in parallel between the supply input terminal
300
and the voltage comparator circuit
220
. The voltage comparator circuit
220
is adapted to make a comparison between the reference voltage VREF applied from the reference voltage generator circuit
100
and the internal voltage VINT supplied from the output transistor P
225
and to control a conductivity of the output transistor P
225
in accordance with a result of the comparison. The voltage comparator circuit
220
is formed of two PMOS transistors P
223
and P
224
and two N-channel MOS (NMOS) transistors N
221
and N
222
.
The reference voltage generator circuit
100
generates a constant reference voltage, VREF, which is supplied to the voltage comparator circuit
220
. When the semiconductor integrated circuit device provided with the internal stepdown circuit
17
shown in
FIG. 7
is in an active mode, the clock signal CS supplied to the current quantity switching circuit
210
is at a low level (logic level=0). Therefore, the PMOS transistor P
211
is kept on in the active mode. Meanwhile, the PMOS transistor P
212
is always in the on state because its gate is connected to the ground GND. Therefore, both the PMOS transistors P
211
and P
212
are turned on in the active mode, and thus a large current is supplied to the voltage comparator circuit
220
. The voltage comparator circuit
220
compares the reference voltage VREF with the internal voltage VINT. When the voltage VREF becomes smaller than the voltage VINT, for instance, due to the increase of the internal voltage VINT caused by the increase of the supply voltage Ext.Vcc or other reasons, the conductivity of the PMOS transistor P
224
decreases. Correspondingly, the potential at the drain of the PMOS transistor P
224
decreases, and thus the conductivity of the NMOS transistor N
221
decreases. Consequently, the potential at the drain of the NMOS transistor N
221
increases, resulting in reduction of the conductivity of the output transistor P
225
. Accordingly, the internal voltage VINT decreases to the same value as the voltage VREF (VINT=VREF). Conversely, if the internal voltage VINT decreases to a value less than the reference voltage VREF (VREF>VINT) the circuit
17
operates in a manner opposite to that described above to maintain the internal voltage VINT at the reference voltage VREF.
As described above, the internal stepdown circuit of
FIG. 7
generates the internal voltage VINT independent of the supply voltage Ext.Vcc. This internal voltage VINT is applied to respective internal circuits in the semiconductor integrated circuit device.
When the semiconductor integrated circuit device provided with the internal stepdown circuit
17
of
FIG. 7
is in a standby condition, the clock signal CS is at the “H” level and the PMOS transistor P
211
is maintained in an off state. Consequently, the current quantity supplied from the current quantity switching circuit
210
to the voltage comparator circuit
220
is reduced, resulting in reduction of the consumption power in the standby mode.
As described above, the internal stepdown circuit of the prior art shown in
FIG. 7
is intended to reduce the consumption power in the standby mode by setting the PMOS transistor P
211
at the off state in the standby mode. However, even when the PMOS transistor P
211
is turned off, a current is supplied to the voltage comparator circuit
220
in the standby mode through the PMOS transistor P
212
, because this PMOS transistor P
212
is turned on. Further, the internal stepdown circuit of the prior art shown in
FIG. 7
has structures in which the current flows in the reference voltage generator circuit
100
even in the standby mode.
Other prior art inventions try to reduce power consumption of the reference voltage generator circuit
100
and the internal voltage control circuit
200
by placing transistors as switches in series with these circuits in order to turn them off during standby mode. However, this does not significantly reduce the power consumption of the circuits because during active mode these circuits still consume power.
Therefore, the internal stepdown circuits of the prior art, such as the circuit shown in
FIG. 7
, still have a serious problem in that the consumption power cannot be sufficiently reduced. Many prior art circuits burn approximately 1 mA or greater of the supply current. Moreover, the circuits are rather complicated and many prior art circuits require the use of a operational amplifiers and band gap references, making the circuits large and power consuming.
An object of the present invention is to provide a circuit that has low power consumption and which burns approximately 0.5 &mgr;A of the supply current, which is much lower than in the prior art.
Another object of the present invention is to provide a simple voltage regulator circuit that occupies a small area and does not require the use of an operational amplifier.
SUMMARY OF THE INVENTION
The above objects have been achieved in the present invention, which provides a voltage regulator circuit that can be described as being made up of a voltage monitoring subcircuit, a voltage tracking subcircuit and a plurality of vol
Kuo Harry H.
Pathak Saroj
Payne James E.
Atmel Corporation
McGuire, Jr. John P.
Schneck Thomas
Zweizig Jeffrey
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