Low-power voltage comparator based on quantum tunneling...

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S155000

Reexamination Certificate

active

07495592

ABSTRACT:
A voltage comparator including a quantum tunneling coupled transistor and a method for tuning the voltage comparator. The comparator includes a quantum tunneling coupled transistor coupled to a resistor and is capable of operating above 10 Giga-samples-per-second or a clock rate of 10 GHz. The comparator has a low power consumption of about 1 mW excluding the power required for clock generation and independent from the sampling rate. The threshold or reference voltage of the comparator is controllable by adjusting the pulse height of the clock signal. The comparator has relatively low hysteresis estimated at about 1 mV.

REFERENCES:
patent: 5329165 (1994-07-01), Kao et al.
patent: 5789940 (1998-08-01), Taddiken
patent: 5825049 (1998-10-01), Simmons et al.
patent: 6110393 (2000-08-01), Simmons et al.
patent: 6750724 (2004-06-01), Mori et al.
patent: 6885325 (2005-04-01), Omelyanchouk et al.
patent: 6929987 (2005-08-01), Moon
patent: 6972702 (2005-12-01), Moon
T. P. E. Broekaert, et al., “A Monolithic 4 Bit 2 GSps Resonant Tunneling Analog-to-Digital Converter,”IEEE, 1997, pp. 187-190, IEEE.
J. S. Moon, et al., “Unipolar complementary circuits using double electron layer tunneling transistors,”Applied Physics Letters, Jan. 11, 1999, pp. 314-316, vol. 74, No. 2, American Institute of Physics.
Elliott R. Brown, et al., “Resonant-Tunneling-Diode Loads: Speed Limits and Applications in Fast Logic Circuits,”Digest of Technical Papers, Feb. 20, 1992, pp. 142-143, Engineering Technologies—Session 8, Paper 8.6, IEEE International Solid-State Circuits Conference.
J. A. Simmons, et al., “Planar quantum transistor based on 2D-2D tunneling in double quantum well heterostructures,”Journal of Applied Physics, Nov. 15, 1998, pp. 5626-5634, vol. 84, No. 10, American Institute of Physics.
Yukio Ikeda, et al., “A Consideration of the Compensation Method for the Gain Expansion Characteristics of Multi-Stage Amplifiers,”1997 Asia Pacific Microwave Conference, 1997, pp. 1101-1103.
Pinaki Mazumder, et al., “Digital Circuit Applications of Resonant Tunneling Devices,”Proceedings of the IEEE, Applications of RTD's, Apr. 1998, pp. 664-686, vol. 86, No. 4, IEEE.
Jason Robertson, et al., “RTD/2-D MESFET Logic Element for Compact, Ultra-Low-Power Electronics,”IEEE Transactions on Electron Devices, Jul. 1997, pp. 1033-1039, vol. 44, No. 7, IEEE.
J. S. Moon, et al., “Planar Tunneling-coupled Field-Effect Transistor for Low-power Mixed-Signal Applications,” 2005, 2 pages, HRL Laboratories, LLC.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low-power voltage comparator based on quantum tunneling... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-power voltage comparator based on quantum tunneling..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-power voltage comparator based on quantum tunneling... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4067851

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.