Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1977-08-31
1978-12-19
Anagnos, Larry N.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307200B, 307244, 307251, 307279, 307DIG1, 307DIG4, 365230, H03K 1760, G11C 800, H03K 1940, H03K 1716
Patent
active
041307682
ABSTRACT:
The prior art, low power ratioless true/complement driver is improved upon by connecting a first isolation FET (T2) so that its gate is connected to drain potential (V.sub.DD) and by connecting to the second isolation FET (T4) so that its gate is connected to the phase-splitting node (1). This enables the number of clock pulse sources necessary to operate the generator circuit to be reduced by one so that the speed of the generator circuit is increased, by virtue of the second isolation FET (T4) having a gate size substantially smaller than the gate size of the inverting FET (T3) so that it will more rapidly switch from its on-state to its off-state than does the inverting FET.
REFERENCES:
patent: 3575613 (1971-04-01), Ebertin
patent: 3906463 (1975-09-01), Yu
patent: 3940747 (1976-02-01), Kuo et al.
patent: 3946369 (1976-03-01), Pashley
patent: 4031415 (1977-06-01), Redwine et al.
patent: 4038646 (1977-07-01), Mehta et ala.
Gladstein et al., "Low-Power Ratioless True-Complement Buffer", IBM Tech. Discl. Bull.; vol. 18, No. 8, pp. 2591-2592; 1/1976.
Anderson, "Address Encoding Circuit", IBM Tech. Discl. Bull.; vol. 17, No. 3, pp. 796-797; 8/1974.
Furman, "Address Buffer True/Complement Generator", IBM Tech. Discl. Bull.; vol. 18, No. 11, pp. 3597-3598; 4/1976.
Kuo et al., "16-K Ram Built with Proven Process may Offer High Start-Up Reliability"; Electronics (pub.); pp. 81-86; 5/13/1976.
Bula John
Patrawala Ashok C.
Anagnos Larry N.
Hoel John E.
International Business Machines - Corporation
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