Low power signal processing for spread spectrum receivers

Pulse or digital communications – Repeaters – Testing

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Details

370320, 370335, 375206, H04B 1500

Patent

active

060288833

ABSTRACT:
A direct sequence spread spectrum architecture permits low power consumption during a synchronization phase of data reception by allowing the receiver to be turned off during most of the acquisition phase of reception, or by using a parallel correlator to keep acquisition time short. The architecture is particularly suitable for global positioning satellite (GPS) signal processing and permits multiple satellite codes and multiple Doppler bins to be searched either sequentially, without requiring the receiver to be turned on during the search process. The receiver output baseband data is sampled and stored over a time interval sufficient to achieve acquisition and synchronization for any one code division multiple access (CDMA) signal at any specific Doppler shift. This sample is digitally recorded and re-played from memory as many times as may be required to acquire and synchronize each desired CDMA signal. To keep processing energy consumption low, an analog (capacitor-based) cross-correlator is used. The order of coherent and non-coherent processing for all code-Doppler channels is chosen to maximize energy efficiency while minimizing required processor hardware.

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