Low power shift register latch

Details Low power shift register latch Low power shift register latch

1983-10-31

1986-07-01

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307453, 307481, 307279, 377 79, 377105, G11C 1140, G11C 1928

Patent

active

045982147

ABSTRACT:
A combination of logic circuits perform logical operations on data and include a plurality of shift register latches. Each shift register latch includes a latch means for the storing of data, an isolation means for isolating the latch means from data and clock signals connected logic circuits when the isolation means is at a first state, and for conducting data to the latch means when the isolation means is at a second state. Each shift register latch also includes a power reduction means for reducing the power consumed by the isolation means and the latch means.

REFERENCES:
patent: 4042841 (1977-08-01), Hills et al.
patent: 4084106 (1978-04-01), Ullrich
patent: 4100429 (1978-07-01), Adachi
patent: 4101790 (1978-07-01), Ebihara et al.
patent: 4216389 (1980-08-01), Carter
patent: 4387294 (1983-07-01), Nakamura et al.
patent: 4506165 (1985-03-01), Gulati et al.

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