Low power shift register circuit

Details Low power shift register circuit Low power shift register circuit

1992-02-05

1994-02-22

Westin, Edward P.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

377 78, 377106, 307480, 3072722, H03K 3284, H03K 1900

Patent

active

052895181

ABSTRACT:
A logic circuit for outputting signals corresponding to an input signal depending on a clock signal sent from an external source includes at least one synchronous flip-flop being synchronized with the clock signal, so that the flip-flop latches the input signal, and a unit for controlling an input of the clock signal to the flip-flop based on a difference between logic levels of an output signal of the flip-flop and an input signal newly latched by the flip-flop.

REFERENCES:
patent: 3636376 (1972-01-01), Hoffmann
patent: 4691122 (1987-09-01), Schnizlein et al.
patent: 4924484 (1990-05-01), Grasso et al.
patent: 5120988 (1992-06-01), Matsuki
patent: 5128974 (1992-07-01), Maekawa
Electronic Circuits: Discrete and Integrated, pp 612-615 and pp. 602-605 (1978).
Robert R. Cordell, "A 45-MBIT/S CMOS VLSI Digital Phase Aligner"; Apr., 1988; IEEE Journal of Solid-State Circuits; pp. 323-328.

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