Low power operation mechanism and method

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

06650171

ABSTRACT:

FIELD
The present invention is directed to power consumption. More particularly, the present invention is directed to reducing power consumption of a chip by applying reverse body bias to transistors of the chip.
BACKGROUND
Mobile processing units such as lap-top computers have special power concerns. This is because the battery that powers the mobile processing unit is a limited energy source. Therefore, the power consumption becomes of importance. It has become increasingly more difficult to achieve high performance and low power consumption per processing unit as the technology scaling trend continues. This is especially challenging for mobile systems where the power requirement is much more stringent. In order to stay within the given power envelope for a mobile system, the power supply (VCC) has to be scaled aggressively which leads to a much slower operating frequency. Because the device miniaturization leads to higher leakage and overall processing unit power, it has become more and more difficult to scale VCC alone to meet the power limits in mobile applications. The aggressive reduction of VCC also severely degrades the frequency and performance of the chip. It is therefore desirable to achieve better power/frequency scaling in mobile processing units.


REFERENCES:
patent: 6097113 (2000-08-01), Teraoka et al.
patent: 6177831 (2001-01-01), Yoneda et al.
patent: 6191615 (2001-02-01), Koga
patent: 6232793 (2001-05-01), Arimoto et al.
patent: 6304110 (2001-10-01), Hirano
patent: 6333571 (2001-12-01), Teraoka et al.
patent: 6380798 (2002-04-01), Mizuno et al.

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