Low power MRAM memory array

Details Low power MRAM memory array Low power MRAM memory array

2001-05-29

2002-10-15

Nelms, David (Department: 2818)

Static information storage and retrieval

Hardware for storage elements

Magnetic

C365S066000, C365S209000

Reexamination Certificate

active

06466471

ABSTRACT:

TECHNICAL FIELD
The technical field is random access memory for data storage. More specifically, the technical field is magnetic random access memory arrays having reduced power requirements.
BACKGROUND ART
Magnetic Random Access Memory (“MRAM”) is a type of non-volatile memory used for long term data storage. Accessing data from MRAM devices is much faster than accessing data from conventional long term storage devices such as hard drives. Additionally, MRAM is compact and consumes less power than hard drives and other conventional long term storage devices.
A typical MRAM device includes an array of memory cells.
FIG. 1
illustrates a conventional memory cell array
10
. The memory cell array
10
includes word lines
14
extending along rows of the memory cell array
10
, and bit lines
16
extending along columns of the memory cell array
10
. Memory cells
12
are located at a cross point of each word line
14
and bit line
16
. Each memory cell
12
stores a bit of information as an orientation of a magnetization. The magnetization orientation of each memory cell
12
assumes one of two stable orientations at any given time. The two stable orientations, parallel and anti-parallel, represent the binary logic values of “1” and “0.”
The magnetization orientation of a selected memory cell
12
is switched by supplying currents to a word line
14
and a bit line
16
that cross at the selected memory cell
12
. The currents create magnetic fields that, when combined, switch the magnetization orientation of the selected memory cell from parallel to anti-parallel, or vice versa.
The magnetization orientation of the conventional memory cell
12
is illustrated by
FIGS. 2A and 2B
. A reference layer
24
and a data storage layer
18
determine the magnetization orientation of the memory cell
12
. The magnetization of the data storage layer
18
can be oriented in either of the two directions indicated by the arrows on the data storage layer
18
in
FIGS. 2A and 2B
. The two possible magnetization directions are aligned with the “easy axis” of the data storage layer
18
. The reference layer
24
includes a layer of magnetic material having fixed, or “pinned” magnetization (illustrated by the arrow on the reference layer
24
). The reference layer magnetization is pinned in a direction parallel to the easy axis. Current supplied to a word line
14
and a bit line
16
crossing at the memory cell
12
switch the magnetization of the data storage layer
18
between the states illustrated by
FIGS. 2A and 2B
. The change in resistance due to the changing memory cell magnetization is detectable by a read circuit to determine the binary state of the memory cell
12
.
As illustrated by
FIGS. 1
,
2
A and
2
B, the word lines
14
and the bit lines
16
are linear, and the easy axis of the data storage layer
18
is oriented parallel to the word lines
14
.
FIG. 3
illustrates the fields generated by a conventional linear word line
14
and bit line
16
, and the resultant magnetization M of a memory cell
12
. The bit line
16
is shown in outline form so that the magnetization M of the memory cell
12
is visible in
FIG. 3. A
current Iy passing through the bit line
16
results in the magnetic field Hx. A similar magnetic field Hy is created when a current Ix passes through the word line
14
. The magnetic fields Hx and Hy combine to switch the magnetic orientation of the memory cell
12
.
Because the fields Hx and Hy are created by orthogonal currents, the magnitude of the switching field generated by the fields Hx and Hy is less than Hx+Hy. Therefore, the currents Ix and Iy are not fully utilized. For example, if the fields Hx and Hy are equal in magnitude, the resultant field is oriented
45
degrees from the word and bit lines
14
,
16
and has a magnitude of about 0.7(Hx+Hy). The orthogonal relationship between the word and bit lines therefore results in higher current requirements for Ix and Iy in order to generate the required switching field.
High word and bit line currents are undesirable because memory array power consumption is a serious limiting factor in MRAM applications. High word and bit currents require larger bit and word lines and write circuits to handle the high currents. This results in larger, more expensive MRAM devices. Therefore, it is desirable to reduce the currents required for the word and bit lines.
A need therefore exists to reduce power consumption of MRAM memory arrays.
SUMMARY
A low power MRAM memory array having non-linear word lines and a permanent magnet layer that generates a transverse magnetic field satisfies the above need and achieves other advantages not present in conventional MRAM devices.
According to a first aspect, an MRAM memory array includes an array of memory cells, a plurality of nonlinear word lines extending in a first direction, and a plurality of substantially linear bit lines extending in a second direction. The word lines cross the bit lines at a plurality of memory cell locations, and the memory cells are located at the memory cell locations.
Also according to the first aspect, portions of the nonlinear word lines can be coextensive in the y direction with portions of the bit lines. Because the word and bit lines are coextensive in the y direction, the magnetic fields generated by currents in the word and bit lines are aligned in the x direction at the coextensive portions. The strength of a resultant magnetic field at a coextensive portion is thereby enhanced. In addition, the resultant field is more closely aligned with the easy axis of the memory cell located at the coextensive portion. Aligning the resultant field with the easy axis reduces the size of the field required to change the magnetization orientation of the memory cell. Therefore, smaller word and bit line currents can be used to switch the binary state of the memory cell, reducing the power consumption of the memory array.
According to a second aspect, each memory cell includes a transversely oriented magnetic layer having a magnetization oriented transversely to the easy axis of the memory cell. The transverse fields improve the reproducibility of switching of the memory cells, and reduce the word and bit line currents required to switch the memory cells.
Also, according to the second aspect, the transverse magnetic field can be applied at all times, so a permanent magnet can be used to form the transversely oriented magnetic layer. No current is required to generate the transverse magnetic field, further reducing the power consumption of the memory array.
Other aspects and advantages will become apparent from the following detailed description, taken in conjunction with the accompanying figures.


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