Low power memory array using selective device activation

Details Low power memory array using selective device activation Low power memory array using selective device activation

1993-01-04

1995-05-09

Popek, Joseph A.

Static information storage and retrieval

Addressing

Plural blocks or banks

365227, 365 63, 365 52, G11C 800

Patent

active

054146704

ABSTRACT:
A memory array for an electronic device comprises a design which requires fewer memory devices to be activated to access a plurality of data bits, thereby reducing the amount of power required to access the data bits. The design comprises the use of a plurality of memory devices, each of which has a plurality of arrays and data out lines.

REFERENCES:
patent: 4881206 (1989-11-01), Kadono
patent: 5089993 (1992-02-01), Neal et al.

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