Low power low voltage differential signaling driver

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S112000

Reexamination Certificate

active

06927608

ABSTRACT:
A low power LVDS driver includes a switchable current module, a source termination circuit, a transistor section, and a load current source. The switchable current module is operably coupled to produce a first current when a differential input signal is in a first state and to produce a second current when the differential input signal is in a second state. The source termination circuit is operably coupled in parallel with a load. The transistor section is operably coupled to receive the first and second currents from the switchable current module via at least one of the source termination circuit and the load, wherein the transistor section produces an LVDS output signal based on the first and second currents, the differential input signal, and the source termination circuit. The load current source is operably coupled to sink the first and second currents from the transistor section.

REFERENCES:
patent: 6326815 (2001-12-01), Sim et al.
patent: 6590422 (2003-07-01), Dillon
patent: 6781445 (2004-08-01), Feldman
Shahriar Jamasb, A 622MHz Stand-alone LVDS Driver Pad in 0.18-um CMOS, IEEE, 3 Park Avenue, 17th Floor, New York, NY., 10016-5997, 2001, Conexant Systems and University of San Diego, San Diego, California.
Andrea Boni, LVDS I/O Interface for Gb/s-per-Pin Operation in 0.35-um CMOS, IEEE Journal Of Solid-State Circuits, Apr. 2001, vol. 36, No. 4, IEEE, 3 Park Avenue, 17th Floor, New York, NY., 10016-5997.
Boni, Andrea; “1.2-Gb/s True PECL 100K Compatible I/O Interface in 0.35-um CMOS,” IEEE Journal of Solid State Circuits, vol. 36, No. 6, Jun. 2001, pp. 979-987, IEEE, 445 Hoes Lane, Piscataway, NJ 08854-1331,USA.
Djahanshahi, Hormoz; “Gigabit-per-Second, ECL-Compatible I/O Interface in -.35-um CMOS,” IEEE Journal of Solid State Circuits, vol. 34, No. 8, Aug. 1999, pp. 1074-1083, IEEE, 445 Hoes Lane, Piscataway, NJ 08854-1331,USA.

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