Low power low noise amplifier

Details Low power low noise amplifier Low power low noise amplifier

2001-04-09

2003-04-29

Choe, Henry (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S285000, C330S302000

Reexamination Certificate

active

06556085

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention related to a low power low noise amplifier, more particularly to the low power low noise amplifier which gives high power gain with low power consumption by improving the conventional low noise amplifier.
2. Description of the Related Art
A low noise amplifier (LNA), which is used for RF receiver in a wireless communication application, is used necessarily at a receiver for obtaining power gain and decreasing noise factor (NF).
A RF system in a wireless communication application requires a low power structure especially for portable communication system. Therefore, it should be designed to be consumed the least power within the range which can be satisfied in.
However, the conventional low noise amplifier needs high power consumption at the RF receiver to satisfy the required power gain and characteristics compared to the present invention. The conventional LNA uses one unit common source amplifier structure showing as
FIG. 1
or cascode amplifier structure showing as FIG.
2
.
SUMMARY OF THE INVENTION,
However, in the conventional amplifier structure, high power gain cannot be obtained due to low transconductance when the amplifier is operated with low power using low bias current. Therefore, it is difficult to obtain high enough linearity and power gain in an RF receiver with low power.
So, the present invention contrived to solve the above mentioned problem is proposed to improve linearity and to obtain high power gain with low power.
To reach the proposed purpose, a parallel-connected common source transistor and common gate transistor are arranged to share a bias current.
The present invention is characterized by having a structure that improves linearity with low power consumption by using a third order intermodulation component with the parallel-connected common source transistor and common gate transistor.


REFERENCES:
patent: 4182992 (1980-01-01), Attwood
patent: 4366450 (1982-12-01), Suganuma
patent: 4940949 (1990-07-01), Landi
patent: 6333677 (2001-12-01), Dening

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