Low-power low-area shift register

Details Low-power low-area shift register Low-power low-area shift register

2001-03-08

2002-08-13

Wambach, Margaret R. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

Reexamination Certificate

active

06434213

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is directed to shift registers, and more particularly, to a low power shift register having selectable segments for adjusting delay.
2. Description of Related Art
Systems for conducting seismic exploration are well known in the art. On land, a plurality of transducers are deployed over a region and configured to receive reflections of an acoustic signal from different geophysical layers beneath the surface of the earth. In the ocean, arrays of transducers may be towed behind a boat in a spaced configuration in order to detect those reflections. In transition regions, between land and ocean, sensors may be positioned underwater at fixed locations. Different types of sensors may be utilized for the different environments in which they may be deployed.
When utilizing a seismic system, a strong acoustic signal is generated by, for example, setting off an explosion or by utilizing an acoustic signal generator having a relatively high power output. Reflections of the acoustic signals from the geophysical layers are then received at the seismic sensors deployed over a given area and the signals recorded, typically, for later analysis.
In some configurations, a seismic sensor is co-located with an analog to digital converter, such as a delta-sigma modulator, which converts an analog signal from the sensor into a digital signal for recording and processing. Seismic exploration has exacting requirements for seismic sensors and for the electronics which process the signals derived from those sensors. There is therefore a need to be able to test both the sensors and related equipment to ensure that both devices and the associated electronics are functioning properly.
SUMMARY OF THE INVENTION
The invention relates to a low power, low area shift register that permits control over delay by selectively directing an input signal to one of a plurality of segments of serially connected shift. register cells, the segments being serially connected. The output of the shift register is taken selectively from a selected cell of one segment of shift register cells. The invention is also directed to techniques for designing and fabricating a shift register.
Still other objects and advantages of the present invention will become readily apparent to those skilled in the art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawing and description are to be regarded as illustrative in nature, and not as restrictive.


REFERENCES:
patent: 4876704 (1989-10-01), Ozaki
patent: 5150389 (1992-09-01), Kawasaki
patent: 5589787 (1996-12-01), Odinot
patent: 6061417 (2000-05-01), Kelem

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