Low-power integrated circuit memory

Static information storage and retrieval – Powering – Conservation of power

Patent

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36523003, G11C 700

Patent

active

052511782

ABSTRACT:
In accordance with one embodiment of the invention, an integrated circuit memory capable of receiving address signals has a plurality of array banks. Each array bank has a plurality of memory cells arranged in rows and columns and has a means for addressing the rows and columns of the array banks in response to the address signals. The integrated circuit includes a means for de-coupling power from at least one array bank in response to at least one bit of an address signal.

REFERENCES:
patent: 5121358 (1992-06-01), Slemmer et al.

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