Low power floating body memory cell based on low bandgap...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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Details

C257S014000, C257S017000, C257SE29069, C257SE29246, C257SE29252, C257SE49002, C257SE49003

Reexamination Certificate

active

07964866

ABSTRACT:
Embodiments of the invention relate to apparatus, system and method for use of a memory cell having improved power consumption characteristics, using a low-bandgap material quantum well structure together with a floating body cell.

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patent: 7670894 (2010-03-01), Rachmady et al.
patent: 7851780 (2010-12-01), Hudait et al.
T. Tanaka, et al., “Scalability Study on a Capacitorless IT-DRAM: From Single-gate PD-SOI to Double-gate FinDRAM”, 2004 IEEE International Electron Devices Meeting Technical Digest, Dec. 2004.
S. Datta et al., “85nm Gate Length Enhancement and Depletion mode InSb Quantum Well Transistors for Ultra High Speed and Very Low Power Digital Logic Applications”, Electron Devices Meeting, 2005 IEDM Technical Digest, Dec. 5-7, 2005, pp. 763-766 (hereinafter, “Datta”).
S. Datta et al., Ultrahigh-Speed 0.5 V Supply Voltage In0.7GA0.3As Quantum Well Transistors on Silicon Substrate, 2007 IEEE Electron Device Letters, vol. 28, No. 8, Aug. 2007, pp. 685-687.
S. Datta et al., “85nm Gate Length Enhancement and Depletion Mode InSb Quantum Well Transistors for Ultra High Speed and Very Low Power Digital Logic Applications”, Components Research, Technology & Manufacturing Group, Intel Corporation, Hillsboro, OR, 4 pages.

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