Low power flip-flop circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S203000, C327S208000

Reexamination Certificate

active

07868677

ABSTRACT:
A flip-flop circuit having low power consumption includes a sensing circuit, and a clock generating circuit. The flip-flop is leading edge triggered and operates on an internally generated pseudo clock signal. The sensing circuit senses a change in an input signal and an output signal of the flip-flop. The clock generating circuit generates a pseudo clock signal with a sharp rise and fall based upon an external clock signal.

REFERENCES:
patent: 4424460 (1984-01-01), Best
patent: 6803799 (2004-10-01), Churchill et al.
patent: 6998896 (2006-02-01), De La Cruz et al.
patent: 7427875 (2008-09-01), Kim et al.
patent: 7518426 (2009-04-01), Smith

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