Low power dual-voltage sense circuit buffer

Details Low power dual-voltage sense circuit buffer Low power dual-voltage sense circuit buffer

1999-10-05

2002-04-23

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S544000, C326S027000, C326S083000, C307S412000

Reexamination Certificate

active

06377086

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an integrated circuit (IC) having a static dual-voltage sensing circuit for use in a mixed-voltage system (a system containing both high and low voltage components).
BACKGROUND OF THE INVENTION
Differential signal amplifier circuits are commonly used in electronic circuits to compare an input voltage level, e.g., from an interfaced power source (a source of power derived from another part of the electronic circuit) with a reference voltage and output a difference signal representing the difference between the two voltages.
FIG. 1
illustrates a differential signal amplifier circuit of the prior art. An input voltage Vin input to a pad P
1
is first scaled down to a suitable level by passing it through a linear network, such as a resistor network comprising resistors RA
2
and RA
3
. Then the scaled-down input voltage is compared to a reference voltage generated by the device power supply VDD, also using a linear network such as a resistor network comprising resistors RA
5
and RA
7
. In doing so, however, the circuit contains three major power consumption sources.
There are two direct current paths from the device power supply (VDD) to ground, one for the reference voltage generation through resistor network RA
5
and RA
7
, and the other for one of the two branches on the differential signal amplifier (either through transistors MP
27
and MN
26
or through transistors MP
25
and MN
22
). There also exists a direct current path for the voltage Vin from the interfaced power supply to ground for the scaled-down input voltage generation, via resistor network RA
2
and RA
3
. These direct paths drain not only the device power supply, but also the power supply of the interfaced device. Thus, it is a challenge to meet the power budget for the device connected to the voltage sensing circuit (e.g., a modem) and for the system as a whole.
In an attempt to reduce the steady-state dc current drain of differential signal amplifier circuits, some differential signal amplifier circuits employ a power-down mode implemented through software. After sampling the voltage and latching the result into a register, the device turns off the reference voltage path to conserve power. This is accomplished with software assistance, for example, by a software program that sets a power-down mode bit in a control register to control operation of the device between the normal mode and the power-down mode. A circuit of this kind has at least two major drawbacks. First, the software required to control the circuit can be very complex. The software must be able to switch off the power-down mode when the higher voltage interfaced circuit is operating, and must switch on the power-down mode after it latches the correct voltage logic value in a register, and then be able to repeat the on-and-off processes each time the interfaced device changes state. Therefore, the software must constantly monitor the current status (i.e., on or off) of the interfaced device. Second, since switching to the power-down mode does not remove the source of the power consumption, i.e. the direct path from the power supply to ground, when the differential signal amplifier sensing circuit is active, there will still be significant power drain occurring.
In certain applications it is desirable to utilize low voltage circuits to reduce the power consumed by the circuit. This has become increasingly important with the proliferation of battery-operated computers, PIM's, telephones, and like devices. However, use of a low-voltage circuit interfaced with a high-voltage power supply can cause damage to the low-voltage components of the low-voltage circuits. Accordingly, buffer circuits have been developed which operate at low voltage but which can tolerate operation without damage in high voltage environments.
No one has developed a dual-voltage sensing circuit that would be considered “low power,” i.e., one that draws reduced power during operation. For some low power applications, such as mobile computing device, cellular devices, and hand-held PDA devices, the periods of active differential signal amplifier sensing and the power drain associated with the sensing is too great to tolerate, causing significant drain on the battery that powers the mobile devices.
SUMMARY OF THE INVENTION
A fully-static dual-voltage sense circuit is designed for a mixed-voltage system. This circuit senses the power-rail voltage of other devices that the device is interfaced with, and can achieve a low-power consumption level without software assistance when the sensing circuit is active, and protects low-voltage process devices in the circuit from possible high voltage damage at the interface. In a preferred embodiment, the present invention comprises an integrated circuit having a dual-voltage sense circuit. The sense circuit includes a sense circuit input node supplied with an input voltage Vin; a sense circuit power input node supplied with a power-supply voltage; and a sense circuit output node outputting a digital signal of a voltage level equal to or less than the voltage level of a low-voltage digital signal, regardless of the voltage level of the input voltage.


REFERENCES:
patent: 4829203 (1989-05-01), Ashmore, Jr.
patent: 5783947 (1998-07-01), Kawano

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