Low power digital circuit for RFID tag

Details Low power digital circuit for RFID tag Low power digital circuit for RFID tag

2005-05-06

2008-09-30

Holloway, III, Edwin C (Department: 2612)

Communications: electrical

Selective

Interrogation response

C340S010100, C340S572100

Reexamination Certificate

active

07429913

ABSTRACT:
Provided is a digital circuit for a passive RFID tag. The digital circuit for the passive RFID tag includes a construction that is divided into blocks, which receive a command, analyze and execute the command, and generate a reply signal respectively, according to the flow of data. Thus, the digital circuit transmits a clock signal to each of the blocks at a rate optimized for the block such that the blocks sequentially operate without any additional controller. The digital circuit for the RFID tag is constructed such that the respective blocks operate at different points in time. This precludes any useless operation of hardware, thus reducing the entire power dissipation.

REFERENCES:
patent: 5621412 (1997-04-01), Sharpe et al.
patent: 2004-0007901 (2004-01-01), None
P. Villard, et al.; “A low-voltage mixed-mode CMOS/SOI integrated circuit for 13.56 MHz RFID applications”; 2002 IEEE International SOI Conference; Oct. 2002; pp. 163-164.
Shoichi Masui, et al.; “A 13.56MHz CMOS RF Identification Transponder Integrated Circuit With A Dedicated CPU”; 1999 IEEE International Solid-State Circuits Conference; Feb. 16, 1999; pp. 162-163.
Andre Abrial, et al.; “A New Contactless Smart Card IC Using an On-Chip Antenna and an Asynchronous Microcontroller”; 2001 IEEE Journal of Solid-State Circutis; Jul. 2001; vol. 36, No. 7; pp. 1101-1107.

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