Low power consumption semiconductor dynamic random access memory

Static information storage and retrieval – Powering – Conservation of power

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36523003, 365222, 365203, G11C 700

Patent

active

056318723

ABSTRACT:
A data refresh is indispensable for a semiconductor dynamic random access memory device, and electric charges are recycled from bit line pairs for a row of memory cell arrays to power supply lines for bit line drivers associated with the next row of memory cell arrays and from bit line pairs for the next row of memory cell arrays to power supply lines for the row of memory cell arrays, thereby reducing power consumption in the data refresh.

REFERENCES:
patent: 5463577 (1995-10-01), Oowaki et al.
patent: 5528552 (1996-06-01), Kamisaki
I. Naritake et al, "A Crossing Charge Recycle Refresh Scheme with a Separated Driver Sense-Amplifier for Gb DRAMs", 1995 Symposium on VLSI Circuits, Digest of Technical Papers, Jun. 8-10, 1995, Japan, pp., 101-102; IEEE Cat. No. 95 CH 35780.

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