Low power consuming memory sense amplifying circuitry

Details Low power consuming memory sense amplifying circuitry Low power consuming memory sense amplifying circuitry

1997-02-11

1998-02-10

Clawson, Jr., Joseph E.

Static information storage and retrieval

Floating gate

Particular biasing

36518516, 36518523, 36518525, 365168, 365104, 36518906, G11C 1606

Patent

active

057176337

ABSTRACT:
Low power consuming circuitry for amplifying sensed signals in memory devices is disclosed. The low power circuitry includes a amplifier circuit having a data bus line for receiving a data signal from a selected column of a memory array. The data bus line being coupled to a first pre-charger transistor for limiting a data bus voltage swing, and a virtual ground control line for controlling a virtual ground application to a selected column of the memory array. The virtual ground application configured to provide a path to ground for the selected column, and the virtual ground control line being coupled to a second pre-charger transistor for limiting a virtual ground voltage swing. Further included is a gain transistor configured to receive the data signal from the data bus line and provide an amplified data signal to a pull down node located at an input of an inverter. And, a digital data output node located at an output of the inverter. The digital data output node being coupled to a gate of a positive feedback transistor, and a drain of the positive feedback transistor being coupled to the pull down node.

REFERENCES:
patent: 5555521 (1996-09-01), Hamada et al.
patent: 5561629 (1996-10-01), Curd
patent: 5625586 (1997-04-01), Yamasaki et al.
patent: 5636161 (1997-06-01), Mann

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