Low-power comparator which tolerates high-slew-rate incoming sig

Details Low-power comparator which tolerates high-slew-rate incoming sig Low-power comparator which tolerates high-slew-rate incoming sig

1989-07-28

1991-09-10

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072964, 307475, H03K 301, H03K 19092

Patent

active

050476637

ABSTRACT:
An integrated circuit which includes switching logic to select its negative power supply voltage from the more negative of two signals (preferably ground and an input signal). Special MOS clamp diodes are used to prevent sharp transients from collapsing the voltage drop of the internal power supply lines (and so disabling the chip).

REFERENCES:
patent: 3666988 (1972-05-01), Bellis
patent: 4833341 (1989-05-01), Watanabe et al.
patent: 4939455 (1990-07-01), Tsagawa

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