Low power CMOS input buffer circuit

Details Low power CMOS input buffer circuit Low power CMOS input buffer circuit

1983-09-22

1985-11-26

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307585, 307297, 323316, H03K 1901, H03K 19017, H03K 19092

Patent

active

045556423

ABSTRACT:
A buffer input circuit, such as for use with a TTL level input, includes an additional or dummy input buffer stage in which the MOS devices are scaled and configured as in a real input buffer stage. The current produced in the dummy input buffer stage for an input voltage at a preset minimum high level is sensed and converted to a compensation voltage, which is applied to the real buffer stages, thereby to modify the current in the real buffer stages to a desired minimum level.

REFERENCES:
patent: 4242604 (1980-12-01), Smith
patent: 4469959 (1984-09-01), Luke et al.
patent: 4471242 (1984-09-01), Noufer
patent: 4473762 (1984-09-01), Iwahashi et al.
patent: 4475050 (1984-10-01), Noufer

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