Low power clock circuit

Details Low power clock circuit Low power clock circuit

1994-04-18

1996-09-24

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327177, 327181, 327304, 331113R, H03K 512, H03K 518

Patent

active

055594638

ABSTRACT:
High-efficiency clock generator circuits having single or complementary outputs for driving capacitive loads. The clock generator has therein at least one pair of complementary FET switches, coupled between the output of the generator and power supply rails, and an inductor. The generator is operated at a frequency approximately equal the resonant frequency of the inductor combined with the capacitance of the load. Energy normally stored in the load and dissipated in the FETs as in conventional clock generators is instead stored in the inductor and returned to the loads for reuse.

REFERENCES:
patent: 3239772 (1966-03-01), Dennis, Jr.
patent: 5068571 (1991-11-01), Schoofs
patent: 5107136 (1992-04-01), Stekelenburg
patent: 5126589 (1992-06-01), Renger
patent: 5396195 (1995-03-01), Gabara
patent: 5408150 (1995-04-01), Wilcox
"An Overview of Soft-Switching Techniques for PWM Converters", CIEP '92 Mexico, ED&PE '92, Czechoslovakia, Guichao Hua and Fred C. Lee, 10 pages.
"Merits and Limitations of Resonant and Soft-Switched Converters", IEEE Aug., 1992, Milan M. Jovanovic, pp. 51 through 58.

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