Low power circuit for disabling startup circuitry in a voltage R

Details Low power circuit for disabling startup circuitry in a voltage R Low power circuit for disabling startup circuitry in a voltage R

1997-12-22

1999-09-07

Sterrett, Jeffrey

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323901, G05F 316

Patent

active

059492279

ABSTRACT:
A low power voltage reference circuit is provided, it has a normal operating mode and a low power mode. In the low power mode, a startup circuit is isolated and operates in low power, and the voltage reference portion of the circuit also operates in low power and provides low voltage output. When the circuit is instead enabled, the startup circuitry forced the referenced circuitry out of its low power mode and into a stable, reference mode.

REFERENCES:
patent: 4742281 (1988-05-01), Nakano et al.
patent: 4857823 (1989-08-01), Bitting
patent: 5367249 (1994-11-01), Honnigford
patent: 5391980 (1995-02-01), Thiel et al.
A Simple Three-Terminal IC Bandgap Reference, IEEE Journal of Solid-State Circuits, vol. SC-9, No. 6, Dec. 1974, pp. 388 through 393.
Low-Noise, Low-Power, Low-Voltage; Mixed-Mode Design with CAD Tools; Voltage, Current and Time References, Analog Circuit Design, Dec. 1996, pp. 269, 280 through 282.

Affiliated with

Also associated with

Rating

Low power circuit for disabling startup circuitry in a voltage R does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low power circuit for disabling startup circuitry in a voltage R, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low power circuit for disabling startup circuitry in a voltage R will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1807588