Low power CCD driver with symmetrical output drive signal

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Patent

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Details

327112, 327327, 327362, 327405, 327490, 326 89, H03K 1714

Patent

active

055006159

ABSTRACT:
A CCD gate driver circuit provides an output drive signal in response to an input clock signal. The output drive signal is symmetrical, uses a minimum amount of power at high frequencies, and compensates for cross-coupling between CCD gates. An input circuit receives the input clock signal and converts it to current pulses on the transitions of the input clock signal. The current pulses are applied to a common input of a pair of complementary input transistors to switch conduction of the transistors. The control inputs of the input transistors are coupled to a reference voltage level. The outputs of the input transistors are coupled to respective current mirrors. The outputs of the current mirrors are in turn coupled to respective inputs of a pair of complementary output transistors that have a common output. A pair of voltage rails that define the voltage swing of the output drive signal are coupled to the respective control inputs of the output transistors. Provision is made to compensate for capacitive intercoupling between the CCD gates being driven, and to provide a trickle current between clock signal transitions to maintain the output at the respective voltage rail.

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