Low power bus-hold circuit

Details Low power bus-hold circuit Low power bus-hold circuit

2007-04-17

2007-04-17

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C326S086000, C327S333000

Reexamination Certificate

active

11100854

ABSTRACT:
A low power bus hold circuit includes: a first inverter having an input coupled to a bus hold input node; and a second inverter having a first input coupled to a first output of the first inverter and a second input coupled to a second output of the first inverter, wherein the first and second outputs of the first inverter are separated by a resistor, and having an output coupled to the bus hold input node.

REFERENCES:
patent: 6097229 (2000-08-01), Hinterscher
patent: 6345380 (2002-02-01), Bonaccio et al.
patent: 6351174 (2002-02-01), Soltero et al.

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