Low power array multiplier

Details Low power array multiplier Low power array multiplier

2005-03-17

2009-06-09

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07546331

ABSTRACT:
An array multiplier comprises a partial product array including a plurality of array elements and a final carry propagate adder. Operands smaller than a corresponding dimension of the partial product array are shifted toward the most significant row or column of the array to reduce the number of array elements used to compute the product of the operands. Switching activity in the unused array elements may be reduced by turning off power to the array elements or by padding the shifted operands with zeros in the least significant bits. Additional power saving may be achieved by having bypass lines in the partial product array that bypasses non-essential array elements and by feeding partial sum and carry directly to the final carry propagate adder. Elements of the carry propagate adder may also be bypassed to achieve further power reduction.

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