Static information storage and retrieval – Addressing – Sync/clocking
Patent
1996-03-07
1997-02-04
Nelms, David C.
Static information storage and retrieval
Addressing
Sync/clocking
36518905, 365193, 36523008, 3652385, G11C 700, G11C 800
Patent
active
056006063
ABSTRACT:
A method of operating a memory device including a plurality of data/address input/output terminals, an array of memory cells and circuitry for accessing selected ones of the memory cells in response to received address bits. At least one row address bit and at least one column address bit are substantially simultaneously input during an address cycle, at least one of the address bits being input through a selected one of the multiplexed terminals. The memory cells addressed by the row and column bits are then accessed through selected ones of the multiplexed terminals during a data access cycle.
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Cirrus Logic Inc.
Nelms David C.
Phan Trong Quang
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