Low-pin-count chip package and manufacturing method thereof

Details Low-pin-count chip package and manufacturing method thereof Low-pin-count chip package and manufacturing method thereof

2005-03-01

2005-03-01

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S126000, C438S127000, C438S438000, C438S612000, C438S617000

Reexamination Certificate

active

06861295

ABSTRACT:
A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip. The semiconductor chip, the die pad, and the connection pads are encapsulated in a package body such that the lower surfaces of the die pad and the connection pads are exposed through the package body. The present invention is characterized in that the die pad and the connection pads have a substantially concave profile thereby prolonging the time for moisture diffusion into the package as well as enhancing the “locking” of the die pad and the connection pads in the package body. The present invention further provides a method of producing the low-pin-count chip package described above.

REFERENCES:
patent: 5891758 (1999-04-01), Honda et al.
patent: 5900676 (1999-05-01), Kweon et al.
patent: 6072239 (2000-06-01), Yoneda et al.
patent: 6187614 (2001-02-01), Takata et al.
patent: 6198171 (2001-03-01), Huang et al.
patent: 6201292 (2001-03-01), Yagi et al.
patent: 6208023 (2001-03-01), Nakayama et al.
patent: 6251707 (2001-06-01), Bernier et al.
patent: 6420779 (2002-07-01), Sharma et al.
patent: 6451627 (2002-09-01), Coffman
patent: 20020012762 (2002-01-01), Bunyan
patent: 20020027265 (2002-03-01), Yoneda et al.
U.S. Appl. No. 2002/0012762 Bunyan (Jan. 31, 2002).*
R.O.C. Publication No. 348306, dated Nov. 7, 1985, entitled Device Having Resin Package and Method of Producing the Same (English Abstract).

Affiliated with

Also associated with

Rating

Low-pin-count chip package and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-pin-count chip package and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-pin-count chip package and manufacturing method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3391415