Low overhead switched header power savings apparatus

Static information storage and retrieval – Powering – Conservation of power

Reexamination Certificate

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C365S230030, C365S230060

Reexamination Certificate

active

07400546

ABSTRACT:
A tri-state power gating apparatus for reducing leakage current in a memory array includes a first distributed header device coupled to the memory array, the first distributed header device is configured for limiting leakage current through the memory array; and a header driver operatively coupled to the first distributed header device for enabling tri-state operation of the first distributed header device, wherein tri-state operation includes sleep mode, wake mode, and retention mode.

REFERENCES:
patent: 6925022 (2005-08-01), Arimoto et al.
patent: 6925025 (2005-08-01), Deng et al.
patent: 7031220 (2006-04-01), Watanabe et al.
patent: 7061820 (2006-06-01), Deng

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