Oscillators – Solid state active element oscillator – Transistors
Reexamination Certificate
2001-05-23
2003-12-02
Pascal, Robert (Department: 2817)
Oscillators
Solid state active element oscillator
Transistors
C331S03600C, C331S158000
Reexamination Certificate
active
06657506
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for low power oscillators generally and, more particularly, to a method and/or architecture for low operating voltage crystal oscillators.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, a circuit
10
is shown implementing a conventional oscillator. The circuit
10
generally comprises a circuit
12
, a resistor
14
, a capacitor C
1
, and a capacitor C
2
. An input signal (i.e., XTIN) is presented to the circuit
12
and to a first side of the capacitor C
1
. An output signal (i.e., XTOUT) is presented from the circuit
12
and to a first side of the capacitor C
2
. A second side of both the capacitors C
1
and C
2
is coupled to ground. The conventional oscillator
10
is implemented as an external oscillator configured to receive the node XTIN and present the node XTOUT.
The resistor
14
has a large resistance to reduce power consumption of the circuit
12
. Additionally, a large independent external resistance (not shown) is coupled between the signal XTIN and the signal XTOUT for biasing the gain of the inverter
12
. The biasing of the circuit
10
is supply dependent. Supply dependent biasing increases the parts per million (ppm) variations of the clock. The output of the circuit
10
is not easily translated to a rail to rail signal. The non-linear capacitance (C
1
and C
2
) adds to the ppm variations. The circuit
10
has difficulties with low power supply voltages.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a first circuit and a capacitor circuit. The first circuit may be configured to generate an output signal having a frequency in response to (i) an input signal having a reference frequency and (ii) one or more adjustment signals. The capacitor circuit may be configured to adjust the frequency of the output signal. The one or more adjustment signals may provide constant current biasing of the first circuit.
The objects, features and advantages of the present invention include providing a method and/or architecture for implementing low operating voltage crystal oscillators that may (i) introduce less variations in gain of the gain stage of an oscillator for a large variation in the power supply voltage (e.g., 1.8-3.6V); (ii) provide current controlled biasing in both the power and ground path; (iii) control the amplitude growth; (iv) tune the capacitance structure while introducing minimal ppm variations; (v) provide easy translation to rail-to-rail logic; and/or (vi) operate with low supply voltages.
REFERENCES:
patent: 4223524 (1980-09-01), Nakagawa
patent: 4956618 (1990-09-01), Ulmer
patent: 5302920 (1994-04-01), Bitting
patent: 6181218 (2001-01-01), Clark et al.
Christopher P. Maiorana P.C.
Cypress Semiconductor Corp.
Glenn Kimberly E
Pascal Robert
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