Low noise test contacts for pin grid array

Details Low noise test contacts for pin grid array Low noise test contacts for pin grid array

1986-08-28

1987-05-26

Weidenfeld, Gil

Geometrical instruments

324158F, 339255R, H01R 1366, H01R 428

Patent

active

046680411

ABSTRACT:
An apparatus for providing an electrical connection between a packaged semiconductor device and a device tester. The apparatus utilizes pogo pins as contactors. The pins are located in a pair of plates, one plate acting as a power source, the other as a ground. A dielectric layer between the plates allows them to act as a charge decoupling capacitor, resulting in a low noise contact.

REFERENCES:
patent: 3335327 (1967-08-01), Damon et al.
patent: 3866119 (1975-02-01), Ardezzone et al.
patent: 4290815 (1981-09-01), Labriola
patent: 4413874 (1983-11-01), Williams
patent: 4460868 (1984-07-01), Schmitt et al.
patent: 4473798 (1984-09-01), Cedrone et al.
patent: 4516072 (1985-05-01), Marpoe, Jr.
"Miniature Multiprobe Assembly", IBM Bulletin, vol. 13, No. 5, Oct. 1970, by: Bullard and Wheeler.

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