Low noise high isolation transmit buffer gain control mechanism

Details Low noise high isolation transmit buffer gain control mechanism Low noise high isolation transmit buffer gain control mechanism

2005-04-26

2008-12-09

Phu, Sanh D (Department: 2618)

Telecommunications

Transmitter

Power control, power supply, or bias voltage supply

C455S180300, C455S240100, C455S260000, C375S308000, C375S297000

Reexamination Certificate

active

07463869

ABSTRACT:
A novel apparatus for a low noise, high isolation, all digital transmit buffer gain control mechanism. The gain control scheme is presented in the context of an all digital direct digital-to-RF amplitude converter (DRAC), which efficiently combines the traditional transmit chain functions of upconversion, I and Q combining, D/A conversion, filtering, buffering and RF output amplitude control into a single circuit. The transmit buffer is constructed as an array of NMOS switches. The control logic for each NMOS switch comprises a pass-gate type AND gate whose inputs are the phase modulated output of an all digital PLL and the amplitude control word from a digital control block. Power control is accomplished by recognizing the impairments suffered by a pseudo class E pre-power amplifier (PPA) when implemented in a CMOS process. Firstly, the NMOS switches of the array have significant on resistance and thus can only draw a limited current from the an RF choke when the input waveform is high. The significant on resistance of the NMOS switches is exploited in the DRAC circuit to introduce power control of the transmitted waveform and permits a fully digital method of controlling the RF output power.

REFERENCES:
patent: 6163178 (2000-12-01), Stark et al.
patent: 6329836 (2001-12-01), Drost et al.
patent: 6631338 (2003-10-01), To et al.
patent: 6924681 (2005-08-01), Staszewski et al.
patent: 2005/0271161 (2005-12-01), Staszewki et al.

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