Low-noise frequency divider

Details Low-noise frequency divider Low-noise frequency divider

2006-09-05

2006-09-05

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S157000, C327S117000

Reexamination Certificate

active

07102399

ABSTRACT:
A multi-modulus divider for producing a low-noise divided output, wherein one embodiment comprises a low-noise frequency divider comprising a pulse-swallow configured divider module and first, second, and third latching blocks. The pulse-swallow configured divider module produces a pre-scaled divider output and a divided oscillation. The divided oscillation is sequentially latched by the latching blocks, wherein the divided oscillation and pre-scaled divider output, coupled as clocks to the latching blocks, resynchronize the divided oscillation to substantially eliminate noise. The first and second latching blocks are biased by a first bias signal and the third latching block is biased by a second bias signal wherein the second bias signal is larger than the first bias signal. Each latching block includes an output load device wherein the impedance of the third latching block is smaller than the impedance of the other output load devices.

REFERENCES:
patent: 4184068 (1980-01-01), Washburn
patent: 4864634 (1989-09-01), Nakagawa et al.
patent: 4965531 (1990-10-01), Riley
patent: 6424192 (2002-07-01), Lee et al.
patent: 6707305 (2004-03-01), Johnson et al.
patent: 2004/0196940 (2004-10-01), Chien

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