Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
1999-02-17
2001-01-09
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C327S359000
Reexamination Certificate
active
06172566
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a low noise amplifier (LNA) operable in two gain modes: high gain (approximately 15 dB) and low gain (or attenuation mode) (approximately −5 dB). The LNA can operate in the high gain mode when a gain switch signal is set to one logic level and to operate in the low gain or attenuation mode when the gain switch signal is set to another level.
2. Description of the Related Art
High-frequency circuits find wide application in communications and broadcasting and in the domain of radio frequency laboratory measurements. High speed switching circuits are useful for fast digital instrumentation used in computers and other digital applications.
High-frequency and high-speed circuits are extensions of ordinary linear and digital circuits in the domain where the effects of interelectrode capacitance, wiring inductance, stored charge, and short wavelength begin to dominate circuit behavior. As a result, such circuits begin to depart from those used at lower frequencies.
Low noise amplifiers are well known in the art. However, until now, such amplifiers operating in the Low gain or attenuation mode (approximately −5 dB), suffer the characteristic of a peak gain at high frequency with this peaking being unacceptable in practical applications.
It is also known to connect a switching circuit to the output of an amplifier circuit to provide the amplifier circuit the additional function of switching on and off the output signal of the amplifier circuit.
Such an amplifier may be constructed by connecting a conventional switching circuit, such as a switching circuit employing a diode bridge, as disclosed in Japanese Patent Laid-open (Kokai) No. 54-148358, to a conventional amplifier circuit.
Other methods of performing selective switching between high gain and low gain (or attenuation) paths are described in the art. For example, one such approach includes the use of cascaded amplification stages, as described in U.S. Pat. No. 5,530,404, one or more of which may be switched out, such as by using a diode switch, to effect different power output levels.
Yet another approach selects between impedance networks which are selectively attached to an amplifier output in order to vary the overall output signal level. An example of this is found in U.S. Pat. No. 5,202,553, which describes a transimpedance amplifier characterized by two separate amplifiers coupled together through a switch, one amplifier operating in the high gain mode and the other operating in the low gain or attenuation mode. Each respective amplifier can be selectively switched depending on a sensed current level to be amplified.
A further example can be found in U.S. Pat. No. 4,227,256, which teaches the use of separate high gain and low gain or attenuation amplifiers combined with a graduated switching circuit to eliminate saturation problems when retaining sensitivity. U.S. Pat. No. 5,541,553 shows an amplifier which performs the function of switching on and off its output signal by employing an inverted Darlington circuit made up of a first transistor and a second transistor, with a switching circuit connected across the base and the emitter of the second transistor, through which a comparatively small current flows, and a switching circuit connected between the emitter of the first transistor and the collector of the second transistor.
These amplifiers typically “tweaked” the peak gain by having a switch in both the high gain and low gain or attenuation paths. Furthermore, the “tweaking” is performed in the subsequent stage or the output of the low noise amplifier, mainly in the automatic gain control section.
FIG. 1
is a schematic circuit diagram of a prior art low noise amplifier
10
. The circuit
10
of
FIG. 1
has two separate gain paths A and B, both coupled to an input source
12
and a transistor switch
14
, used to select either gain path A or B. current through gain path A flows through transistor
18
, which is M times larger in size than transistor
24
, through which current of gain path B flows. M is typically between 10 and 20.
In such an amplifier, called a common emitter type amplifier, the resulting voltage gain has the relationship:
A
v
=−g
m
(
r
o
||R
c
)
where
g
m
=q
I
c
/kT
and where ro is the combined impedance of transistor
28
and transistor
22
, R
c
is resistor
16
, q is electron charge (or 1.6×10
−19
coulomb), I
c
is the current flow through either transistor
18
or transistor
24
. (More current flows through transistor
18
because transistors
18
and
24
are biased with the same potential, and the size of transistor
18
is M times larger than the size of transistor
24
.), k is boltzmann's constant, and T is temperature in Kelvin degrees.
In operation, when the transistor switch
14
receives a logic low level, the amplifier
10
is set to operate in the high gain mode (in which current flows through path A, and also through path B). Conversely, when the transistor switch
14
receives a logic high level, the amplifier
10
is set to operate in the low gain or attenuation mode (in which current flows only through path B).
Tracing the current path A, resistor
16
acts as a gain booster, characterized by the relationship between high gain and a large collector resistance.
The current flowing through current path B flows from the output
20
through transistor
22
and through transistor
24
. When operating in the high gain mode, the current flow through current path B can almost be ignored, because the transistor
18
is M times bigger in size than transistor
24
and the base of both transistors
18
and
24
are biased with the same potential. Thus, the current flows in current path A through transistor
18
is M times larger than the current flow in current path B through transistor
24
.
When gain switch
14
receives a logic level high, the high gain path A can be ignored because the current flow through transistor
18
is detoured through transistor
14
instead of going through transistor
28
and no voltage amplification takes place at the junction of resistor
16
and transistor
28
. Thus, the circuit
10
consists essentially of the low gain or attenuation path B.
In both cases, the circuit
10
has characteristics of a common-emitter type amplifier. Tracing low gain or attenuation path B, resistor
16
acts as a gain booster, characterized by the relationship between high gain and a large collector resistance, with more current through transistor
18
than through transistor
24
.
FIG. 2
shows the gain vs. frequency when the circuit
10
of
FIG. 1
is operating in the low gain or attenuation mode. As can be seen from
FIG. 1
, at point P the high frequency peak passes unwanted high frequencies. This peak is unacceptable in practical applications.
SUMMARY OF THE INVENTION
A low noise amplifier circuit has a signal input, a signal output, a gain control input and a plurality of gain paths. Each of the plurality of gain paths is connected in parallel to each of the signal input, signal output and gain control input. The circuit further comprises means for selecting one of the plurality of gain paths to connect the signal input to the signal output. The amplifier circuit also comprises means for amplifying the signal input, with the amplifying means connected between the signal input and the signal output. Finally, the amplifier circuit comprises filtering means for filtering the input signal through at least one of the gain paths.
REFERENCES:
patent: 4227256 (1980-10-01), O'Keefee
patent: 4727335 (1988-02-01), Yokoyama
patent: 5157350 (1992-10-01), Rubens
patent: 5202553 (1993-04-01), Geller
patent: 5227737 (1993-07-01), Sutliff et al.
patent: 5329189 (1994-07-01), Ushida et al.
patent: 5365279 (1994-11-01), Harford
patent: 5528197 (1996-06-01), Frey
patent: 5530404 (1996-06-01), Debroux
patent: 5541553 (1996-07-01), Chujo et al.
patent: 5541554 (1996-07-01), Stengel et al.
patent: 5548246 (1996-08-01), Yamamoto et al.
pa
Kabushiki Kaisha Toshiba
Limbach & Limbach LLP
Nguyen Khanh Van
Pascal Robert
Yin, Esq. Ronald L.
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