Low-loss semiconductor device and backside etching method for ma

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

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257192, 257619, H01L 2980, H01L 2964, H01L 29205, H01L 2906

Patent

active

052528421

ABSTRACT:
A semiconductor device has material removed from the back of the substrate and a manufacturing process is provided for manufacturing these devices. In the exemplary embodiment, a GaAs FET chip is formed by a process including the step of etching the GaAs substrate from the back of the chip in a defined removal region to reduce the dielectric constant in the region of the source-to-drain path. A buffer layer of differing material provided between the active layers and the substrate prevents etching of the active layers during the removal process. To allow simplified etching patterns, the source-to-drain path may be laid out on the surface of the chip in a variety of patterns, including "packed" patterns concentrating a large path area in a small surface area of the chip. Optionally, this buffer layer may also be etched away in a further processing step. An insulating layer of material may be added to the back side of the chip in the etched region to increase structural strength, and a pressure relief ventilation path may be provided connecting the removal region to the outside at an edge or at the surface of the chip.

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Publication appearing in Journal of the Electrical Chemical Society Entitled "Selective Etching Characteristics of Peroxide/Ammonium-Hydroxide Solutions for GaAs/Al.sub.0.16 Ga.sub.0.84 As", by Kelly Kenefick.
Document Entitled "Processing, Fabrication, and Demonstration of High Temperature Ceramic Superconductors: Integrated Microwave Circuits of Multilayer YBCO Film Structures", Prepared by Westinghouse Electric Corp., Feb. 20, 1990.

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