Low loss operating circuit for a discharge lamp

Details Low loss operating circuit for a discharge lamp Low loss operating circuit for a discharge lamp

2002-02-19

2003-12-16

Wong, Don (Department: 2821)

Electric lamp and discharge devices: systems

Periodic switch in the supply circuit

Silicon controlled rectifier ignition

C315S224000

Reexamination Certificate

active

06664743

ABSTRACT:

This invention relates to a circuit arrangement for feeding a lamp comprising
a first input terminal K
1
and a second input terminal K
2
which are to be connected to a supply voltage source supplying a DC voltage,
an inverter for generating a square-wave periodic voltage from said DC voltage, which inverter is provided with a series arrangement of a first switching element S
1
, a first inductive element L
1
, a second inductive element L
2
and a second switching element S
2
, and which inverter interconnects the input terminals,
a control circuit which is coupled to a control electrode of the first switching element S
1
and to a control electrode of the second switching element S
2
, which control circuit is used to generate a control signal for rendering the first and the second switching element alternately conducting and non-conducting,
a load branch comprising a third inductive element L
3
, lamp terminals for connecting the lamp, and a first capacitive element C
1
,
a first unidirectional element D
1
having an anode coupled to the second input terminal K
2
and a cathode coupled to a point between the first switching element S
1
and the first inductive element L
1
,
a second unidirectional element D
2
having a cathode coupled to the first input terminal K
1
and an anode coupled to a point between the second switching element S
2
and the second inductive element L
2
.
Such a circuit arrangement is disclosed in WO-9902020. In the known circuit arrangement, the control circuit is also provided with a dimmer circuit for dimming the lamp by regulating the duty cycle of the control signal. In addition, the self-inductances L
1
′, L
2
′ and L
3
′ of, respectively, the first, the second and the third inductive element L
1
, L
2
and L
3
are chosen so as to be substantially equal to each other. The first and the second inductive element are magnetically coupled to each other and hence jointly form a transformer. As a result of said values of the self-inductances and by virtue of this magnetic coupling, it is achieved that the shape of the current through the lamp during dimming the lamp comes fairly close to a sine shape. In other words, the lamp current comprises comparatively few higher harmonic terms, as a result of which the amount of disturbance generated by the lamp is limited. In addition, in the known circuit arrangement, acoustic resonances are effectively suppressed. In a part of the range wherein the duty cycle of the control signal can be regulated “hard switching” occurs. This means that each one of the switching elements is rendered conducting while a comparatively high voltage is present across the switching element. This may give rise to a comparatively high power dissipation in the switching elements. In the known circuit arrangement, this power dissipation is counteracted to a limited extent only as a result of the fact that the first and the second inductive element are arranged in series with the switching elements. In addition, a drawback of the known circuit arrangement resides in that the transformer formed by the first and the second inductive element is a comparatively expensive and bulky component.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a circuit arrangement wherein the power dissipation caused by “hard switching” is effectively counteracted using comparatively straightforward, inexpensive and small components.
To achieve this object, a circuit arrangement as mentioned in the opening paragraph is characterized, in accordance with the invention, in that with respect to the self-inductances L
1
′, L
2
′ and L
3
′ of, respectively, the first, second and third inductive element, the following relationship applies;
L
3
′>5*
L
1
′ and
L
3
′>5*
L
2
′.
In a circuit arrangement in accordance with the invention, power dissipation in the switching elements due to “hard switching” is substantially suppressed in spite of the comparatively small self-inductances of the first and the second inductive element. Power that would be dissipated in the switching elements, if the first and the second inductive element and the first and the second unidirectional element were absent, is effectively fed back to the supply voltage source or used to generate a current through the lamp. It has been found that this applies if the first and the second inductive element are magnetically coupled, but also if the inductive elements are not coupled.
It has been found that in many cases power dissipation is very effectively counteracted if with respect to the self-inductances L
1
′, L
2
′ and L
3
′ of, respectively, the first, second and third inductive element, it applies that
 
L
3
′>10
*L
1
′ and
L
3
′>10*
L
2
′.
It has also been found that power dissipation can be further reduced if the circuit arrangement is additionally provided with a third unidirectional element D
3
and a fourth unidirectional element D
4
, with a cathode of the third unidirectional element D
3
being coupled to the first input terminal K
1
, an anode of the fourth unidirectional element D
4
being coupled to the second input terminal K
2
and an anode of the third unidirectional element D
3
and a cathode of the fourth unidirectional element D
4
each being coupled to a point between the first inductive element L
1
and the second inductive element L
2
.
As the circuit arrangement comprises parasitic capacitances, oscillations occur which are brought about by the first and the second inductive element and said parasitic capacitances. By means of the third and the fourth unidirectional element it is achieved that the amplitude of voltages caused by these oscillations, particularly of the voltage on the point between the first and the second inductive element, remains limited. A further reduction of the power dissipation is thus achieved. In addition, the unidirectional elements D
3
and D
4
form part of current paths for “reverse” currents having a small impedance. As a result, in the case of “hard switching”, the third unidirectional element D
3
carries current, not the second unidirectional element D
2
, for rendering the second switching element S
2
conducting. Correspondingly, the fourth unidirectional element D
4
carries current, not the first unidirectional element D
1
, for rendering the first switching element S
1
conducting. By virtue thereof, power dissipation in the first and the second unidirectional element and the switching elements is limited substantially when the switching elements are becoming conducting.
Field effect transistors such as MOSFETs are often used as the switching elements in a circuit arrangement in accordance with the invention. Such field effect transistors comprise an internal diode that is capable of guiding the current in a direction that is in opposition to the direction in which the field effect transistor carries current in the conducting state. These internal diodes play an important part in the functioning of the circuit arrangement since they carry current during specific operational phases of the circuit arrangement. If these internal diodes are comparatively slow, then a comparatively high power dissipation occurs when said internal diodes become non-conducting. This contribution to the power dissipation can be reduced substantially if the circuit arrangement is additionally provided with a fifth unidirectional element D
5
which is arranged in series with the first switching element S
1
, a sixth unidirectional element D
6
which is arranged in series with the second switching element S
2
, a first shunt branch which comprises a seventh unidirectional element D
7
and shunts the series arrangement of the fifth unidirectional element D
5
and the first switching element S
1
, and a second shunt branch which comprises an eighth unidirectional element D
8
and shunts the series arrangement of the sixth unidirectional element D
6
and the second switching element S
2
. Said unidirectional elements D
5
-D
8

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