Low loss, high density array interconnection

Details Low loss, high density array interconnection Low loss, high density array interconnection

2006-05-02

2006-05-02

Cuneo, Kamand (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C174S255000

Reexamination Certificate

active

07038917

ABSTRACT:
An interconnect architecture in which a substrate such as a printed circuit board includes multiple conductive layers separated by one or more interposed insulating layers, the conductive layers being adapted to receive a high density array of interconnect elements such as a ball grid array (BGA). In certain preferred embodiments, a printed circuit board may provide a very low resistance interconnect forming the drain and source terminals of a lateral power MOSFET device incorporating a high density array of alternating source and drain interconnect elements, such as a BGA. In such embodiments, source and drain currents may be routed on different conductive layers separated by one or more interposed insulating layers. The upper conductive layer may include laterally non-conductive regions accommodating conductive columns that are connected to the lower conductive layer.

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