Low leakage silicon-on-insulator CMOS structure and method of ma

Details Low leakage silicon-on-insulator CMOS structure and method of ma Low leakage silicon-on-insulator CMOS structure and method of ma

1989-08-29

1991-02-26

James, Andrew J.

357 4, 357 53, 357 2314, 357 42, H01L 2701, H01L 2713, H01L 2978, H01L 2712

Patent

active

049965751

ABSTRACT:
A CMOS device is provided with a field shield region below one of the P and N channel MOS transistors, whereby the field shield region is formed to have the opposite conductivity of both the one MOS transistor it underlies, and of the substrate, thereby permitting the field shield region to be biased to a potential for turning off any anomalous back channel leakage current in the one MOS transistor, and also permitting the substrate to be biased to an opposite polarity for turning off such leakage current in the other MOS transistor.

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patent: 4778775 (1988-10-01), Tzeng
patent: 4907053 (1990-03-01), Ohmi

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