Low leakage input protection device and scheme for...

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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C361S111000

Reexamination Certificate

active

06842318

ABSTRACT:
ESD input protection device uses a transistor (82) with the source terminal (100) connected to the input (12) from these source (18) to provide an alternate path for discharge. By having the input (12) imprint connected to the source (100) rather than the drain (102) and the substrate (104) and gate (103) terminals connected to a reference so that a decrease in the leakage current (Is) is realized as the source voltage (18) is increased over a range. The protection scheme is suitable for use with smaller device geometries such as 0.18 CMOS operating at 1½ to 2 volts.

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Ker et al. 1996, Capacitor-Coupled ESED Protection Circuit for Deep-Submicron Low-Voltage CMOS ASIC, IEEE Trans. VLSI, v.4, No. 3, pp. 307-321.

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