Low-latency high-speed trellis decoder

Details Low-latency high-speed trellis decoder Low-latency high-speed trellis decoder

2000-02-05

2004-05-25

Tse, Young T. (Department: 2634)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S262000, C375S265000, C714S795000, C714S796000

Reexamination Certificate

active

06741664

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods and systems for decoding input signal samples in a high-speed communication system. More particularly, the invention relates to a method and a system for decoding signals encoded according to the trellis code specified in the Advanced Television Systems Committee (ATSC) Digital Television Standard.
2. Description of Related Art
Error correction systems are typically used to ensure data integrity during storage and transmission. This is accomplished by preceding the data to be protected with one or more so called error correction codes. Trellis codes are a widely utilized sub-class of error correction codes. Though many decoding schemes for trellis codes exist, these are typically optimized for either very high speed operation, or for minimal circuit area. In either case, decoder latency is not a primary concern in these decoding schemes.
The symbol estimates produced by a trellis decoder are much more likely to be correct than the ones produced by a simple slicing procedure, since the trellis decoder utilizes the redundancy structure of the imbedded trellis code when making decisions. However, improved symbol estimates can only be used by the decision feedback equalizer (DFE) portion of the equalizer to increase the performance of the overall system if they are computed with a very short latency. Since the DFE is particularly needed in applications having severe channel impairments, a low-latency decoder is desirable for such applications.
Trellis decoders are maximally efficient error correctors for channels where the noise is uncorrelated from sample to sample. The existence of correlated noise can significantly reduce the effectiveness of this type of error corrector. Traditional trellis decoders are sub-optimal for channels exhibiting a highly correlated noise. One approach to combat this type of channel impairment is to employ multiple encoders/decoders in an interleaving scheme. This approach is practical if the expected correlations span only a relatively small number of symbols. The interleaved multiple-encoder system specified in the ATSC digital television standard is such an encoding system. Therefore, there is a need for an efficient low-latency high-speed decoder that can decode symbols transmitted from such an encoding system in a channel having highly correlated noise.
SUMMARY OF THE INVENTION
The present invention provides a method and a system for decoding a word received at a current time instant into a symbol of a trellis code. The trellis code corresponds to a trellis diagram having N states associated with the current time instant. Each of the N states corresponds to at least one incoming branch. Each of the incoming branches is associated with a symbol of the trellis code. The branch metrics are computed for the incoming branches such that a branch metric represents a distance between the received word and a symbol associated with the corresponding branch. The branch metric is represented by fewer bits than a squared Euclidian metric representation of the distance. For each of the N states, a node metric is computed based on corresponding branch metrics and one of the incoming branches associated with the state is selected. One of the N states is selected as an optimal state based on the node metrics. The symbol associated with the selected incoming branch corresponding to the optimal state is the decoded word.


REFERENCES:
patent: 4777636 (1988-10-01), Yamashita et al.
patent: 5408502 (1995-04-01), How
patent: 5914988 (1999-06-01), Hu et al.
patent: 5991343 (1999-11-01), Oh et al.
patent: 6324226 (2001-11-01), Sasagawa
patent: 6373900 (2002-04-01), Agazzi et al.
patent: 6385258 (2002-05-01), Ooya et al.
patent: 6477680 (2002-11-01), Mujtaba

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