Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Rendering selected devices operable or inoperable
Reexamination Certificate
2005-12-06
2005-12-06
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Rendering selected devices operable or inoperable
C438S618000, C438S623000, C438S624000, C438S631000, C438S633000, C438S778000, C438S781000
Reexamination Certificate
active
06972217
ABSTRACT:
A low-k interconnect dielectric layer is strengthened by forming pillars of hardened material in the low-k film. An E-beam source is used to expose a plurality of pillar locations. The locations are exposed with a predetermined power and exposure time to convert the low-k film in the selected locations to pillars having higher hardness and strength than the surrounding portions of the low-k film.
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patent: 6077764 (2000-06-01), Sugiarto et al.
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patent: 6245663 (2001-06-01), Zhao et al.
patent: 2003/0087191 (2003-05-01), Lavallee et al.
patent: 2004/0048960 (2004-03-01), Peterson et al.
patent: 2004/0058277 (2004-03-01), He et al.
Allman Derryl J.
May Charles
Beyer Weaver & Thomas LLP
Fourson George
LSI Logic Corporation
Pham Thanh V.
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