Low-k interlevel dielectric layer (ILD)

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Reexamination Certificate

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Details

C257S635000, C257S750000, C257S759000, C257S760000, C257S762000, C257S773000

Reexamination Certificate

active

07009280

ABSTRACT:
An interlevel dielectric layer (ILD) comprises a low-k dielectric layer; and a low-k dielectric film, deposited under compressive stress, atop the dielectric layer. The dielectric layer comprises a low-k material, such as an organosilicon glass (OSG) or a SiCOH material. The dielectric film has a thickness, which is 2%–10% of the thickness of the dielectric layer, has a similar chemical composition to the dielectric layer, but has a different morphology than the dielectric layer. The dielectric film is deposited under compressive stress, in situ, at or near the end of the dielectric layer deposition by altering a process that was used to deposit the low-k dielectric layer.

REFERENCES:
patent: 6218302 (2001-04-01), Braeckelmann et al.
patent: 6436808 (2002-08-01), Ngo et al.
patent: 6475925 (2002-11-01), Braeckelmann et al.
patent: 6483173 (2002-11-01), Li et al.
patent: 6518646 (2003-02-01), Hopper et al.
patent: 6528432 (2003-03-01), Ngo et al.
patent: 6541374 (2003-04-01), de Felipe et al.
patent: 2004/0127016 (2004-07-01), Hoog et al.

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