Low-jitter, non-slip clock generator

Details Low-jitter, non-slip clock generator Low-jitter, non-slip clock generator

1995-11-28

1997-12-02

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327115, 327160, 327299, 377 47, H03K 19094

Patent

active

056940661

ABSTRACT:
A clock signal generator for converting a high speed clock signal to a low speed clock signal, the generator including a first counter receiving the high speed clock signal and counting the cycles thereof, the first counter being configured to count to a first preselected value and then generate an output signal indicating when the first preselected value is reached; a second counter receiving the high speed clock signal and counting the cycles thereof, the second counter being configured to count to a second preselected value and then generate an output signal indicating when the second preselected value is reached, wherein the first and second preselected values are different; and an m-state controller receiving the output signals from the first and second counters and generating the low-speed clock signal therefrom, the m-state generator periodically outputting a reset signal to reset the first and second counters to restart counts in each of those counters.

REFERENCES:
patent: 4841167 (1989-06-01), Saegusa
patent: 5345109 (1994-09-01), Mehta

Affiliated with

Also associated with

Rating

Low-jitter, non-slip clock generator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-jitter, non-slip clock generator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-jitter, non-slip clock generator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-804929