Low jitter integrated phase locked loop with broad tuning range

Oscillators – Ring oscillators

Reexamination Certificate

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Details

C331S017000, C331SDIG002, C331S074000

Reexamination Certificate

active

06825733

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to tuning of, and noise suppression in phase locked loop systems used in signal transmitters and receivers.
BACKGROUND OF THE INVENTION
Provision of a low jitter phase locked loop (PLL) system is critical in many transmitter and receiver system, in order to provide accurate timing information for many communication systems. A PLL system of a first design, using a ring-based voltage controlled oscillator (VCO) can provide a wide frequency tuning range but behaves as a high pass filter for noise that appears in a VCO. Ideally, the associated signal jitter should be no more than 1-10 percent of the period T of the target frequency or frequencies at which such a system is to operate. This jitter figure of merit cannot be achieved, or even approached, using a ring-based VCO, as the operating frequency increases.
What is needed is a PLL system that provides a broad tuning range. preferably from about 1 GHz to about 10 Ghz for an optical transmission system, and provides signals with relatively low jitter, &Dgr;T (jitter)≦0.01 T-0.1 T. Preferably, the system should allow selection of one or more target frequencies within this tuning range and should have an associated signal processing time delay that is approximately constant over the tuning range. Preferably, the system should have an associated time delay that does not vary strongly with the target frequency.
SUMMARY OF THE INVENTION
These needs are met by the invention, which combines two types of VCO mechanisms, one being switchable, to provide a versatile, low jitter PLL system with wide tuning range. A first stage of the system includes a ring-based VCO mechanism having a tuning range that can extend to, or beyond, 1 GHz-10 Ghz. The first stage is preferably used for initial signal acquisition and lock onto one or more frequencies in a selected sub-range. A second stage of the system includes one or more LC tank circuits that are switchable into and out of the system. With the LC tank circuit(s) switched out of the system (first state), this circuit becomes transparent, and the initial acquisition and frequency lock are implemented with no differential attenuation based on frequency. With the LC tank circuit(s) switched into the system (second state), the initially acquired signal frequency or frequencies are subjected to narrow bandwidth tuning that suppresses sideband frequency components in the acquired signal and passes frequencies within a narrow band that includes a selected target or resonant frequency.


REFERENCES:
patent: 3909735 (1975-09-01), Anderson et al.
patent: 4131862 (1978-12-01), Black et al.

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