Low input capacitance amplifier

Details Low input capacitance amplifier Low input capacitance amplifier

1982-05-17

1985-02-05

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including combined diverse-type semiconductor device

330277, 330292, H03F 138, H03F 316

Patent

active

044980582

ABSTRACT:
A first feedback loop to a regulator transistor within the drain circuit of the input field effect transistor (FET) serves to maintain the voltage across the drain-gate junction of the input FET at a constant value consistent with FET operation as a source follower, thereby mitigating junction to junction capacitances within the FET. A second feedback loop created guard circuits on the cases of the input FET and the drain circuit regulator transistor, thereby mitigating junction to external circuitry capacitances. A third feedback loop modifies essentially constant current flow in the source circuit of the input FET in order to compensate for capacitance within that circuit. When utilized in compact form for microprobing of low voltage nanosecond rise time signals, the amplifier demonstrates an effective input capacitance of less than 0.5 picofarads.

REFERENCES:
patent: 4390852 (1983-06-01), Addis
Holmer, "An Electrometer Amplifier for Electrophysiology with Low Input Capacitance", Med. & Biol. Engng., vol. 8, No. 5, Pergamon Press, 1970, pp. 509-511.
Towers, "High Input-Impedance Amplifier Circuits", Wireless World, Jul. 1968, pp. 197-201.

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